Ion implantation systems are mechanisms utilized to dope semiconductor substrates with dopants or impurities in integrated circuit manufacturing. In such systems, a dopant material is ionized and an ion beam is generated there-from. The beam is directed at the surface of a semiconductor wafer or workpiece in order to implant the wafer with one or more dopant elements. The ions of the beam penetrate the surface of the wafer to form a region of desired conductivity, such as in the fabrication of transistor devices in the wafer. A typical ion implanter includes an ion source for generating the ion beam, a beamline assembly including a mass analysis apparatus for directing and/or filtering (e.g., mass resolving) the ions within the beam using magnetic fields, and a target chamber containing one or more semiconductor wafers or workpieces to be implanted by the ion beam.
Ion implanters are advantageous because they allow for precision with regard to both quantity and placement of dopants within the silicon. In order to achieve a desired implantation for a given application, the dosage and energy of the implanted ions may be varied. The ion dosage controls the concentration of implanted ions for a given semiconductor material. Typically, high current implanters are used for high dose implants, while medium current implanters are used for lower dosage applications. The ion energy is used to control junction depth in semiconductor devices, where the energy levels of the beam ions determine the degree to which ions are implanted or the depth of the implanted ions.
One commercially available ion implantation system uses an ion source that includes a source chamber spaced from an implantation chamber where one or more workpieces are treated by ions from the source. An exit opening in the source chamber allows ions to exit the source so they can be shaped, analyzed, and accelerated to form an ion beam. The ion beam is directed along an evacuated beam path to the ion implantation chamber where the ion beam strikes one or more workpieces, typically circular wafers. The energy of the ion beam is sufficient to cause ions that strike the wafers to penetrate those wafers in the implantation chamber. Such selective implantation thus allows an integrated circuit to be fabricated.
It can be appreciated that given the continuing trend in the electronics industry to scale down electronic devices to produce smaller, yet more powerful devices (e.g., cell phones, digital cameras, etc.) that can perform a greater number of increasingly complex functions with less power, that semiconductors and integrated circuits (e.g., transistors, etc.) utilized in these devices are continually reduced in size. The ability to “pack” more of these devices onto a single semiconductor substrate, or portion thereof (known as a die) also improves fabrication efficiency and yield. To increase packing densities, features formed in and on a wafer as part of the semiconductor fabrication process may be reduced in size. It can be appreciated that the accuracy with which dopants can be added to select locations of semiconductor substrates plays a critical role in successfully increasing packing densities. For example, there may be smaller margins for error with regard to implanting dopant ions within select locations of the semiconductor substrate given the reduced feature sizes. Accordingly, mechanisms and techniques that facilitate more accurate and uniform ion implantations are desirable.